The present invention relates generally to semiconductor device fabrication, and more particularly an integrated tool for performing electrodeposition and chemical-mechanical polishing.
Some semiconductor device fabrication processes require a planarizing step following a metallization step. For example, in one well-known dual inlaid process, referred to as dual damascene, an electrodeposition step may be performed to fill vias, contacts and wiring on the substrate. Once the vias, contacts and wiring have been formed, the metal is planarized to remove excess metal overlying the dielectric layer.
Chemical-mechanical polishing (CMP) is one method of planarizing a substrate. CMP typically requires that the substrate be mounted on a carrier or polishing head in a CMP apparatus. The exposed surface of the substrate is placed against a rotating polishing pad, and an aqueous polishing slurry is supplied to the polishing pad. The interaction of the polishing pad, slurry and substrate results in planarization of the substrate and removal of excess metal. The substrate is then rinsed, to remove the slurry, and dried in a controlled manner to minimize particulates and contamination of the substrate.
Electrodeposition is one method of depositing a metal layer ("metallization") on a substrate. Electrodeposition requires that the substrate be suspended in an aqueous chemical solution. In one method the metal to be deposited is suspended in the solution and a voltage is applied between the substrate (cathode) and the metal (anode). This process is called "electrolytic plating" or "electroplating." In an alternative method an electrochemical reaction deposits the metal layer onto the substrate without an applied voltage. This alternative method is called "electroless plating." Again, as in CMP, the substrate is then rinsed, to remove the chemical solution, and dried in a controlled manner to minimize particulates and contamination of the substrate.
Typically, substrates are dried in a controlled manner after any wet processing. This is because if substrates are allowed to dry by evaporation, contamination concentrations increase as the droplets of water evaporate, causing concentrations of silicon and other contaminants on the substrate which can create defects. However, multiple clean and dry processes reduce the throughput.